1. Field of the Invention
The present invention relates to manufacturing small dimension features of objects, such as integrated circuits, using photolithographic masks. More particularly, the present invention relates to the application of phase shift masking to complex layouts for integrated circuits and similar objects.
2. Description of Related Art
Phase shift masking, as described in U.S. Pat. No. 5,858,580, has been applied to create small dimension features in integrated circuits. Typically the features have been limited to selected elements of the design, which have a small, critical dimensions. Although manufacturing of small dimension features in integrated circuits has resulted in improved speed and performance, it is desirable to apply phase shift masking more extensively in the manufacturing of such devices. However, the extension of phase shift masking to more complex designs results in a large increase in the complexity of the mask layout problem. For example, when laying out phase shift areas on dense designs, phase conflicts will occur. One type of phase conflict is a location in the layout at which two phase shift windows having the same phase are laid out in proximity to a feature to be exposed by the masks, such as by overlapping of the phase shift windows intended for implementation of adjacent lines in the exposure pattern. If the phase shift windows have the same phase, then they do not result in the optical interference necessary to create the desired effect. Thus, it is necessary to prevent inadvertent layout of phase shift windows in phase conflict.
Another problem with laying out complex designs which rely on small dimension features, arises because of isolated exposed spaces which may have narrow dimension between unexposed regions or lines. Furthermore, proximity effects including optical proximity effects, resist proximity effects, and etch proximity effects, can have greater impact on the layout of dense, small dimension patterns.
Because of these and other complexities, implementation of a phase shift masking technology for complex designs will require improvements in the approach to the design of phase shift masks, and new phase shift layout techniques.
The present invention provides techniques for extending the use of phase shift techniques to implementation of masks for complex layouts in the layers of integrated circuits, beyond selected critical dimension features such as transistor gates to which such structures have been limited in the past. The invention provides a method that includes identifying features for which phase shifting can be applied, automatically mapping the phase shifting regions for implementation of such features, resolving phase conflicts which might occur according to a given design rule, applying assist features, and adjusting for proximity correction shapes within phase shift windows and within trim mask shapes associated with the phase shift windows. The present invention is particularly suited to opaque field phase shift masks which are designed for use in combination with trim masks for clearing unwanted artifacts of the phase shift masking step, and optionally defining interconnect structures and other types of structures, necessary for completion of the layout of the layer.
In one embodiment, the process of identifying features suitable for implementation using phase shifting includes reading a layout file which identifies features of the complex pattern to be exposed.
In one preferred embodiment, the phase shift mask includes an opaque field, and the phase shift regions include a plurality of transparent windows having a first phase within the opaque field, and a plurality of complementary transparent windows having a second phase approximately 180 degrees out of phase with respect to the first phase, within the opaque field. The opaque field leaves unexposed lines formed using the phase transition between phase shift regions unconnected to other structures in some cases. A complementary trim mask is laid out for use is conjunction with the opaque field phase shift mask. In one embodiment, the complementary trim mask is a binary mask, without phase shifting features. In other embodiments, the trim masks include various combinations of binary features, tri-color features, phase shift features, attenuated phase shift features and attenuated-opacity trim features.
The present invention provides a method for laying out an opaque field, alternating phase shift mask pattern and a trim mask pattern for use with the phase shift mask pattern to produce a target feature, and providing for proximity adjustments, including but not limited to optical proximity correction OPC adjustments, to the patterns. The phase shift mask pattern includes a first phase shift window having a first side and a second side opposite the first time and spaced away from the first side by a phase shift window width, a second phase shift window having a first side and a second side opposite the first side and spaced away from the first side by a phase shift window width, and an opaque field referred to sometimes as xe2x80x9ccontrol chrome,xe2x80x9d having a control width, overlying the region of phase transition along the respective first sides in between the first and second phase shift windows. The trim mask pattern includes an opaque trim shape in a location corresponding with said region of phase transition and having a trim width in the dimension parallel with said control width. According to the present invention, an adjustment for proximity effects, is applied to at least one, and preferably both, of the phase shift mask pattern and the trim mask pattern based upon one or both of the rule based correction and a model based correction to improve a match between resulting exposure pattern and a target feature. In one embodiment, the adjustment includes one, or more than one, of the following process steps:
(1) adjusting said first phase shift window width and said second phase shift window width,
(2) adjusting said control width,
(3) adjusting said trim width,
(4) adding a sub-resolution opaque shape to one or both of the first and second phase shift windows,
(5) adding a clear shape to the trim shape, and
(6) adding one or more opaque shapes to one or both of the first and second phase shift windows and adding a clear shape or shapes to the trim mask pattern, where
(i) the opaque shapes in the phase shift windows are at or above resolution, and clear shapes in the trim shape are below resolution in one embodiment, and are at or above resolution in another embodiment, and
(ii) the opaque shapes in the phase shift windows are below resolution, and clear shapes in the trim shape are below resolution in one embodiment, and are at or above resolution in another embodiment.
The sub-resolution shapes do not xe2x80x9cprintxe2x80x9d in the image being exposed, but affect the intensity profile at the wafer level, such as by improving contrast of the image and thereby improving process latitude, and changing the size of the printed image caused by the phase shift region in which the sub-resolution feature is laid out, such as for optical proximity correction OPC.
As a result of the layout rule, regions in the phase shift mask may result in phase conflicts. Thus, embodiments of the invention also include applying an adjustment to one or more of the phase shift regions in the phase shift mask to correct for phase conflicts. The adjustment for phase conflicts in one embodiment comprises dividing a phase shift region having a first phase into a first phase shift region having the first phase in a second phase shift region having the second phase. An opaque feature is added to the phase shift mask between the first and second phase shift regions. The complementary mask includes a corresponding opaque feature preventing exposure of the features to be exposed using the first and second phase shift regions in the phase shift mask, and includes a cut-out over the opaque feature separating the first and second phase shift regions to expose any feature resulting from the phase difference between the first and second phase shift regions. In one embodiment, the unique structure which results from the adjustment is laid out in the first instance to prevent phase conflicts in the layout, and so may not be considered an xe2x80x9cadjustmentxe2x80x9d to correct a phase conflict in the layout.
For example, phase conflicts can arise in the implementation of a pattern consisting of an intersection of an odd number of line segments. The odd number of line segments defines a plurality of corners at the intersection. In this case, phase shift regions are laid out adjacent the line segments on either side of the corner so they have the same phase, and preferably continuing around the corner in all of the plurality of corners, except one. In one excepted corner, a first phase shift region having the first phase is laid out adjacent the line segment on one side of the corner, and a second phase shift region having the second phase is laid out adjacent the line segment on the other side of the corner. An opaque feature is added between the first and second phase shift regions in the one corner. The complementary mask includes a corresponding opaque feature preventing exposure of the intersecting line segments left unexposed by the phase shift mask, and includes a cut-out over the opaque feature separating the first and second phase shift regions to expose any feature resulting from the phase difference in the one excepted corner between the first and second phase shift regions.
The selection of the one excepted corner having the cut-out feature in the structure that defines the intersection of an odd number of line segments is implemented in various embodiments according to design rules. In one design rule, the one excepted corner is the corner defining the largest angle less than 180 degrees. In another design rule, the one excepted corner is the corner which is the greatest distance away from an active region on the integrated circuit.
In one embodiment, the pattern to be implemented includes exposed regions and unexposed regions. Exposed regions between unexposed regions (i.e., spaces between lines or other structures) having less than a particular feature size are identified for assist features. The particular feature size used for identification of exposed regions between unexposed regions may, or may not, be the same as the feature size used for selection of unexposed regions (i.e., lines) to be implemented using phase shift masking. According to this aspect of the invention, the process includes laying out phase shift regions in the phase shift mask to assist definition of edges of the unexposed regions between exposed regions.
According to another aspect of the invention, the process includes adding opaque shapes inside a particular phase shift region in the phase shift mask. The opaque shapes comprise in various embodiments features inside and not contacting the perimeter of the particular phase shift region. In other embodiments, the opaque shapes result in division of a phase shift region having a first phase into first and second phase shift regions having the same phase. An opaque shape between the first and second phase shift regions acts in one embodiment is a sub-resolution feature, and improves the shape of the resulting exposed and unexposed regions that define the target feature.
According to another aspect of the invention, the layout of phase shifting regions in an opaque field includes a step of simulating an intensity profile or other indication of the exposure pattern to be generated, and locating regions in the exposure pattern which are anomalous, such as by having higher intensity. Sub-resolution shapes features are then added to the layout covering the anomalous regions in the exposure pattern to adjust the exposure pattern to provide for better target feature definition.
The use of sub-resolution shapes within phase shift regions is applied uniquely for the formation of an array of closely spaced target features, such as an array of capacitor plates used in dynamic random access memory designs.
An overall process for producing a layout file, or a photolithographic mask is provided that includes identifying features to be implemented using phase shifting, laying out phase shifting regions so as to prevent or minimize phase conflicts, applying sub-resolution assist features to the phase shift regions, and producing a layout file. Next, a complementary trim mask is laid out to complete the exposure pattern for a target feature. Also, according to the present invention, adjustments are applied to both the trim mask pattern and the phase shift mask pattern.
One embodiment of the invention is a method for producing a computer readable definition of a photolithographic mask used for defining a layer in an integrated circuit, or other work piece, where the layer comprises a pattern including a plurality of features to be implemented with phase shifting. The method includes identifying cutting areas for phase shift regions based on characteristics of the pattern. Next, the process cuts the phase shift regions in selected ones of the cutting areas to define phase shift windows, and assigns phase values to the phase shift windows. The cutting of the regions into windows and assigning of phase shift values to the windows is basically an iterative process, in which the order of cutting and assigning depends on the particular procedure, and may occur in any order. The phase shift values assigned comprise N and 2, so that destructive interference is caused in transitions between adjacent phase shift windows having respective phase shift values of N and 2. In the preferred embodiment, N is equal to approximately 2+180 degrees. Results of the cutting of phase shift regions into phase shift windows, and assigning phase values to the phase shift windows are stored in a computer readable medium. Adjustments for proximity correction as described above are typically applied after the cutting process just described.
By identifying the cutting areas based on characteristics of the pattern to be formed, the problem of dividing phase shift regions into phase shift windows, and assigning phase shift values to the windows is dramatically simplified.
Representative criteria applied in the cutting of phase shift regions into phase shift windows, and assigning phase values to the phase shift windows, include the following:
1. Try to avoid the creation of small phase shift windows that are difficult to manufacture on the mask and that do not provide sufficient process latitude.
2. Try to keep the number of cuts to a minimum and keep the cuts with the maximum process latitude. For example, cuts originating from an outside opaque (typically chrome) corner tend to have a better process latitude than cuts originating from an inside opaque corner. Long cuts from an original opaque feature to an original opaque feature tend have more process latitude than short cuts. Cuts from an original opaque feature to a field area tend to have more process latitude than cuts from an original opaque feature to an original opaque feature.
In one embodiment of the invention, a cost function is applied, in performing the cutting and assigning steps, which relies on the identified cutting areas and on the positions and shapes of features in the pattern to be formed using the phase shift windows.
The step of identifying cutting areas includes in one embodiment of the invention, a process comprising three steps. The first step involves identifying features in the plurality of features that are characterized by non-critical process latitude to define a set of non-critical features. The second step involves identifying fields between features in the plurality of features characterized by critical process latitude to define a set of critical fields. The third step involves defining cutting areas as areas within the phase shift regions which extend between two features in the set of non-critical features, or between a feature in the set of non-critical features and a field outside the phase shift regions, without intersecting a field in the set of critical fields. The identified cutting areas are further refined in other embodiments, by changing the shape of the cutting areas or by elimination of cutting areas, based upon characteristics of the pattern, characteristics of phase shift windows which may result from cutting in the cutting area, and/or other criteria that identify areas in which cutting is less desirable.
Examples of non-critical features include elbow shaped features, T-shaped features, and polygons larger than a particular size. Parameters utilized to identify non-critical features can be determined using simulations based upon simulation criteria which tends to flag features characterized by non-critical process latitude. For example, simulations of over exposure conditions tend to identify non-critical features.
Examples of critical fields include fields between narrow lines that are close together. Parameters utilized to identify critical fields can be determined using simulations based upon simulation criteria which tend to flag fields characterized by critical process latitude. For example, simulations of under-exposure conditions tend to identify critical fields between features which bridge together across the critical field in under-exposure conditions.
In another embodiment of the invention, an article of manufacture comprising a machine readable data storage medium having stored thereon instructions executable by a data processing system defining steps for laying out a photolithographic mask according to the process is described above. In another embodiment of the invention, a data processing system including a processor and memory storing such instructions is provided.
In another embodiment, the present invention provides a photolithographic mask including a plurality of phase shift regions divided into phase shift windows in cutting areas that are defined as described above. Thus, a photolithographic mask for defining a pattern in a layer to be formed using the mask, wherein said pattern includes a plurality of features, and said layer includes fields outside said pattern, is provided that comprises a substrate, a mask layer of material on said substrate. The mask layer includes phase shift regions and fields, and a plurality of phase shift windows in the phase shift regions, the plurality of phase shift windows characterized by phase shift values that create phase transitions between the phase shift windows to form said pattern, wherein the boundaries of the phase shift windows lie within cutting areas that are defined based upon characteristics of said pattern. A set of features in the plurality of features, where features in the set are characterized by non-critical process latitude, and a set of critical fields between features in the plurality of features where fields in the set are characterized by critical process latitude. The cutting areas include areas within the phase shift regions which extend between two features in the set of features, or between a feature in the set of features and a field outside the phase shift regions, without intersecting a field in the set of critical fields.
In further embodiments, the present invention provides a method for manufacturing photolithographic masks according to the process described above, and a method for manufacturing a layer in an integrated circuit utilizing the photolithographic mask as described above. In addition, a new class of integrated circuits is provided that is manufactured according to the methods described herein, and have a patterned layer of material with a plurality of small dimension features which are closely spaced and implemented using alternate phase shift masking. The new class of integrated circuits comprise layers have a dense pattern of small features, that was not achievable applying the prior art techniques.
A method for producing integrated circuits having improved small dimension structures includes applying a photo-sensitive material to a wafer, exposing the photo-sensitive material using the phase shift mask implemented as described above, exposing the photo-sensitive material using the complementary trim mask implemented as described above, and developing the photo-sensitive material. A next process step in the method for producing integrated circuits involves the removal of material underlying the photo-sensitive material according to the resulting pattern, or addition of material over the wafer according to the pattern resulting from the use of the phase shift and complementary masks. The resulting integrated circuit has improved, and more uniform line widths, and improved and more uniform spaces between structures on the device. In some embodiments, the resulting integrated circuit has intersecting lines defined with phase shift masks.
The present invention provides techniques for extending the use of phase shift techniques to implementation of masks for a pattern having high density, small dimension features, and the use of such masks for implementing the pattern in a layer of an integrated circuit, or other work piece. For example, the techniques of the present invention are applied in areas including multiple features using phase shift windows, where those features are in close proximity. The techniques are also applied for so-called xe2x80x9cfull shiftxe2x80x9d of dense patterns on layers of a work piece.
Accordingly, the present invention provides for the design and layout of photolithographic masks, and the manufacture of integrated circuits, in which the use of phase shifting is extended to so-called xe2x80x9cfull shiftxe2x80x9d patterns, in which a pattern in the integrated circuit layer is defined utilizing alternate phase shifting techniques.
Other aspects and advantages of the present invention can be understood with review of the figures, the detailed description and the claims which follow.